#include <asm/io.h>Go to the source code of this file.
Defines | |
| #define | MAX_DMA_CHANNELS 8 |
| #define | IO_DMA1_BASE 0x00 |
| 8237 DMA controllers 8 bit slave DMA, channels 0..3 | |
| #define | IO_DMA2_BASE 0xC0 |
| 16 bit master DMA, ch 4(=slave input)..7 | |
| #define | DMA1_CMD_REG 0x08 |
| DMA controller registers command register (w). | |
| #define | DMA1_STAT_REG 0x08 |
| status register (r) | |
| #define | DMA1_REQ_REG 0x09 |
| request register (w) | |
| #define | DMA1_MASK_REG 0x0A |
| single-channel mask (w) | |
| #define | DMA1_MODE_REG 0x0B |
| mode register (w) | |
| #define | DMA1_CLEAR_FF_REG 0x0C |
| clear pointer flip-flop (w) | |
| #define | DMA1_TEMP_REG 0x0D |
| Temporary Register (r). | |
| #define | DMA1_RESET_REG 0x0D |
| Master Clear (w). | |
| #define | DMA1_CLR_MASK_REG 0x0E |
| Clear Mask. | |
| #define | DMA1_MASK_ALL_REG 0x0F |
| all-channels mask (w) | |
| #define | DMA2_CMD_REG 0xD0 |
| command register (w) | |
| #define | DMA2_STAT_REG 0xD0 |
| status register (r) | |
| #define | DMA2_REQ_REG 0xD2 |
| request register (w) | |
| #define | DMA2_MASK_REG 0xD4 |
| single-channel mask (w) | |
| #define | DMA2_MODE_REG 0xD6 |
| mode register (w) | |
| #define | DMA2_CLEAR_FF_REG 0xD8 |
| clear pointer flip-flop (w) | |
| #define | DMA2_TEMP_REG 0xDA |
| Temporary Register (r). | |
| #define | DMA2_RESET_REG 0xDA |
| Master Clear (w). | |
| #define | DMA2_CLR_MASK_REG 0xDC |
| Clear Mask. | |
| #define | DMA2_MASK_ALL_REG 0xDE |
| all-channels mask (w) | |
| #define | DMA_ADDR_0 0x00 |
| DMA address registers. | |
| #define | DMA_ADDR_1 0x02 |
| #define | DMA_ADDR_2 0x04 |
| #define | DMA_ADDR_3 0x06 |
| #define | DMA_ADDR_4 0xC0 |
| #define | DMA_ADDR_5 0xC4 |
| #define | DMA_ADDR_6 0xC8 |
| #define | DMA_ADDR_7 0xCC |
| #define | DMA_CNT_0 0x01 |
| DMA count registers. | |
| #define | DMA_CNT_1 0x03 |
| #define | DMA_CNT_2 0x05 |
| #define | DMA_CNT_3 0x07 |
| #define | DMA_CNT_4 0xC2 |
| #define | DMA_CNT_5 0xC6 |
| #define | DMA_CNT_6 0xCA |
| #define | DMA_CNT_7 0xCE |
| #define | DMA_PAGE_0 0x87 |
| DMA page registers. | |
| #define | DMA_PAGE_1 0x83 |
| #define | DMA_PAGE_2 0x81 |
| #define | DMA_PAGE_3 0x82 |
| #define | DMA_PAGE_5 0x8B |
| #define | DMA_PAGE_6 0x89 |
| #define | DMA_PAGE_7 0x8A |
| #define | DMA_MODE_READ 0x44 |
| I/O to memory, no autoinit, increment, single mode. | |
| #define | DMA_MODE_WRITE 0x48 |
| memory to I/O, no autoinit, increment, single mode | |
| #define | DMA_MODE_CASCADE 0xC0 |
| pass thru DREQ->HRQ, DACK<-HLDA only | |
Functions | |
| static __inline__ void | enable_dma (unsigned int dmanr) |
| enable/disable a specific DMA channel | |
| static __inline__ void | disable_dma (unsigned int dmanr) |
| static __inline__ void | clear_dma_ff (unsigned int dmanr) |
| static __inline__ void | set_dma_mode (unsigned int dmanr, char mode) |
| set mode (above) for a specific DMA channel | |
| static __inline__ void | set_dma_page (unsigned int dmanr, char pagenr) |
| static __inline__ void | set_dma_addr (unsigned int dmanr, unsigned int a) |
| static __inline__ void | set_dma_count (unsigned int dmanr, unsigned int count) |
| static __inline__ int | get_dma_residue (unsigned int dmanr) |
| int | request_dma (unsigned int dmanr) |
| These are in kernel/dma.c: reserve a DMA channel. | |
| void | free_dma (unsigned int dmanr) |
| release it again | |
| #define DMA1_CLEAR_FF_REG 0x0C |
| #define DMA1_CMD_REG 0x08 |
| #define DMA1_MASK_REG 0x0A |
single-channel mask (w)
Definition at line 84 of file dma.h.
Referenced by disable_dma(), and enable_dma().
| #define DMA1_MODE_REG 0x0B |
| #define DMA2_CLEAR_FF_REG 0xD8 |
| #define DMA2_MASK_REG 0xD4 |
single-channel mask (w)
Definition at line 95 of file dma.h.
Referenced by disable_dma(), and enable_dma().
| #define DMA2_MODE_REG 0xD6 |
| #define DMA_MODE_CASCADE 0xC0 |
| #define DMA_MODE_READ 0x44 |
| #define DMA_MODE_WRITE 0x48 |
| #define DMA_PAGE_0 0x87 |
| #define DMA_PAGE_1 0x83 |
| #define DMA_PAGE_2 0x81 |
| #define DMA_PAGE_3 0x82 |
| #define DMA_PAGE_5 0x8B |
| #define DMA_PAGE_6 0x89 |
| #define DMA_PAGE_7 0x8A |
| #define IO_DMA1_BASE 0x00 |
8237 DMA controllers 8 bit slave DMA, channels 0..3
Definition at line 77 of file dma.h.
Referenced by get_dma_residue(), set_dma_addr(), and set_dma_count().
| #define IO_DMA2_BASE 0xC0 |
16 bit master DMA, ch 4(=slave input)..7
Definition at line 78 of file dma.h.
Referenced by get_dma_residue(), set_dma_addr(), and set_dma_count().
| #define MAX_DMA_CHANNELS 8 |
NOTES about DMA transfers:
controller 1: channels 0-3, byte operations, ports 00-1F controller 2: channels 4-7, word operations, ports C0-DF
DMA transfers are limited to the lower 16MB of _physical_ memory. Note that addresses loaded into registers must be _physical_ addresses, not logical addresses (which may differ if paging is active).
Address mapping for channels 0-3:
A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) | ... | | ... | | ... | | ... | | ... | | ... | | ... | | ... | | ... | P7 ... P0 A7 ... A0 A7 ... A0 | Page | Addr MSB | Addr LSB | (DMA registers)
Address mapping for channels 5-7:
A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) | ... | \ \ ... \ \ \ ... \ \ | ... | \ \ ... \ \ \ ... \ (not used) | ... | \ \ ... \ \ \ ... \ P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 | Page | Addr MSB | Addr LSB | (DMA registers)
Again, channels 5-7 transfer _physical_ words (16 bits), so addresses and counts _must_ be word-aligned (the lowest address bit is _ignored_ at the hardware level, so odd-byte transfers aren't possible).
Transfer count (_not # bytes_) is limited to 64K, represented as actual count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, and up to 128K bytes may be transferred on channels 5-7 in one operation.
| static __inline__ void clear_dma_ff | ( | unsigned int | dmanr | ) | [static] |
Clear the 'DMA Pointer Flip Flop'. Write 0 for LSB/MSB, 1 for MSB/LSB access. Use this once to initialize the FF to a known state. After that, keep track of it. :-) --- In order to do that, the DMA routines below should --- --- only be used while interrupts are disabled! ---
Definition at line 161 of file dma.h.
References DMA1_CLEAR_FF_REG, DMA2_CLEAR_FF_REG, and outb.
| static __inline__ void disable_dma | ( | unsigned int | dmanr | ) | [static] |
| static __inline__ void enable_dma | ( | unsigned int | dmanr | ) | [static] |
enable/disable a specific DMA channel
Definition at line 134 of file dma.h.
References DMA1_MASK_REG, DMA2_MASK_REG, and outb.
| void free_dma | ( | unsigned int | dmanr | ) |
release it again
| static __inline__ int get_dma_residue | ( | unsigned int | dmanr | ) | [static] |
Get DMA residue count. After a DMA transfer, this should return zero. Reading this while a DMA transfer is still in progress will return unpredictable results. If called before the channel has been used, it may return 1. Otherwise, it returns the number of _bytes_ left to transfer.
Assumes DMA flip-flop is clear.
using short to get 16-bit wrap around
Definition at line 272 of file dma.h.
References inb, IO_DMA1_BASE, and IO_DMA2_BASE.
| int request_dma | ( | unsigned int | dmanr | ) |
These are in kernel/dma.c: reserve a DMA channel.
| static __inline__ void set_dma_addr | ( | unsigned int | dmanr, | |
| unsigned int | a | |||
| ) | [static] |
Set transfer address & page bits for specific DMA channel. Assumes dma flipflop is clear.
Definition at line 222 of file dma.h.
References IO_DMA1_BASE, IO_DMA2_BASE, outb, and set_dma_page().
| static __inline__ void set_dma_count | ( | unsigned int | dmanr, | |
| unsigned int | count | |||
| ) | [static] |
Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for a specific DMA channel. You must ensure the parameters are valid. NOTE: from a manual: "the number of transfers is one more than the initial word count"! This is taken into account. Assumes dma flip-flop is clear. NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
Definition at line 247 of file dma.h.
References IO_DMA1_BASE, IO_DMA2_BASE, and outb.
| static __inline__ void set_dma_mode | ( | unsigned int | dmanr, | |
| char | mode | |||
| ) | [static] |
set mode (above) for a specific DMA channel
Definition at line 170 of file dma.h.
References DMA1_MODE_REG, DMA2_MODE_REG, and outb.
| static __inline__ void set_dma_page | ( | unsigned int | dmanr, | |
| char | pagenr | |||
| ) | [static] |
Set only the page register bits of the transfer address. This is used for successive transfers when we know the contents of the lower 16 bits of the DMA current address register, but a 64k boundary may have been crossed.
Definition at line 187 of file dma.h.
References DMA_PAGE_0, DMA_PAGE_1, DMA_PAGE_2, DMA_PAGE_3, DMA_PAGE_5, DMA_PAGE_6, DMA_PAGE_7, and outb.
Referenced by set_dma_addr().
1.4.6-5